
cover
- Published: October 2025
- Pages: 337
- Tables: 93
- Figures: 29
The global market for glass substrates in semiconductor applications is experiencing a critical inflection point as the technology transitions from research and development to commercial production, driven by insatiable demand for advanced packaging solutions in AI, high-performance computing, and next-generation communications. The glass substrate market addresses fundamental limitations of organic substrates while offering cost and scalability advantages over silicon interposers.
Glass substrates replace organic cores in advanced chip packages, providing superior dimensional stability, lower dielectric loss, and larger format capabilities essential for multi-chiplet architectures. The technology enables manufacturers to achieve sub-2μm redistribution layer geometries, supporting massive I/O counts (10,000-50,000 per package) while maintaining thermal and electrical performance across extreme temperature ranges (-40°C to 150°C). Key advantages include 40% performance improvements in signal integrity, 50% power consumption reduction, and exceptional flatness (<20μm warpage across 100mm packages) compared to organic alternatives that suffer dimensional instability beyond 55mm.
Through-glass via (TGV) technology represents the critical enabler, with multiple formation approaches competing: laser-induced deep etching (LIDE) combining laser modification with wet etching, direct laser ablation, and photosensitive glass methods. Recent demonstrations show 6μm diameter vias with aspect ratios exceeding 15:1, enabling high-density vertical interconnection supporting panel-scale processing from display industry heritage.
The market exhibits sophisticated segmentation across application domains. AI and high-performance computing represent the largest near-term opportunity, with glass substrates enabling 60-80mm packages integrating 8-16 chiplets with HBM memory stacks—architectures impossible with warped organic substrates. Data center switches requiring 51.2-102.4 Tbps aggregate bandwidth increasingly adopt co-packaged optics (CPO) architectures that leverage glass transparency for integrated optical waveguides alongside electrical interconnection.
Telecommunications infrastructure, particularly 5G massive MIMO and emerging 6G systems operating at 100-300 GHz frequencies, represents another compelling segment where organic substrates' electrical losses render them inadequate. Automotive applications, especially 77-81 GHz radar for ADAS and autonomous driving platforms, benefit from glass's phase stability maintaining beam coherence across temperature extremes. Consumer electronics adoption concentrates in premium segments—5G millimeter-wave smartphones, AR/VR headsets, and gaming systems—where performance differentiation justifies cost premiums during early commercialization. Major technology companies including Apple, Tesla, AMD, and Amazon AWS are conducting qualification testing, with Samsung Electronics planning glass substrate interposer adoption by 2028 and operating pilot lines at Sejong facilities.
Intel's strategic pivot from internal production to licensing its extensive patent portfolio (600+ glass substrate patents) could accelerate industry-wide commercialization by enabling latecomers to advance development more rapidly. Samsung Electro-Mechanics targets first prototypes by Q2 2025, while LG Innotek builds Gumi pilot lines aiming for year-end prototype production. Glass material suppliers including AGC, Corning, SCHOTT, and Nippon Electric Glass provide substrate-grade compositions optimized for CTE matching and low dielectric loss.
Despite compelling advantages, glass substrates face significant adoption barriers: current costs run 2-3x organic equivalents, manufacturing yields remain at 75-85% versus organic substrates' 90-95%, and supply chain concentration creates single-source dependencies. Brittleness requires specialized handling automation, while TGV formation and fine-pitch RDL processes demand continued optimization. Customer qualification cycles spanning 18-36 months delay market entry, particularly in conservative industries like automotive and telecommunications.
However, aggressive cost reduction roadmaps project 40-60% declines by 2030 through manufacturing scale, yield improvements, and competitive supply emergence. As processes mature and ecosystem infrastructure develops—design tools, standards, contract manufacturing services—glass substrates are positioned to capture 20-30% of advanced packaging market by 2036, with deployment timelines accelerating as major technology companies validate commercial viability through pilot programs transitioning to volume production in 2027-2030 timeframe.
The Global Market for Glass Substrates for Semiconductors 2026-2036 delivers comprehensive analysis of this transformative advanced packaging technology poised to revolutionize semiconductor manufacturing. As AI accelerators, 5G/6G infrastructure, and autonomous vehicles demand unprecedented integration density and electrical performance, glass substrates emerge as the critical enabling platform displacing conventional organic substrates and challenging silicon interposers across high-performance applications.
Report Contents include:
- Comprehensive market overview with global forecasts 2026-2036 (revenue and volume)
- Glass materials fundamentals and applications across semiconductor packaging
- Technology drivers: dimensional stability, low dielectric loss, panel-scale processing
- Supply chain evolution from pilot production to mainstream adoption
- Application segment analysis: advanced packaging, photonic integration, high-frequency RF
- Competitive landscape assessment covering 37+ companies
- Technical challenges and risk mitigation strategies
- Investment outlook and adoption scenarios
- Detailed unit shipment and market value forecasts by product category (carriers, core substrates, interposers)
- Glass Substrates Technology Fundamentals
- Material properties: borosilicate, quartz, specialty compositions with comparison matrices
- Manufacturing processes: glass forming, TGV formation methods, metallization, panel-level processing
- Design considerations: thermal management, mechanical stress analysis, electrical performance optimization
- Glass in Advanced Packaging and IC Substrates
- Advanced packaging evolution from 1D through 4D integration architectures
- Intel's advanced packaging roadmap and heterogeneous integration solutions
- Glass IC substrates evolution and organic-to-glass transition pathway
- Through-glass via technology comprehensive analysis with vendor-specific approaches
- TGV metallization processes and comparison matrices
- Material properties and I/O density advantages
- Traditional substrate limitations driving glass adoption
- Glass substrate manufacturing processes including CHIMES innovations
- Intel's glass production line capabilities
- Glass in Photonics
- Photonic integration overview and optical coupling strategies
- Co-packaged optics (CPO) comprehensive analysis and architecture options
- Glass waveguide technologies: ion exchange, fiber coupling, signal routing
- Corning's 102.4 Tb/s platform and 3D integration demonstrations
- Glass in High-Frequency Applications
- High-frequency material requirements and transmission loss analysis
- Material benchmarking: LTCC versus glass comparisons
- Glass suppliers and products directory
- RF applications: filters, IPD, antenna-in-package for 5G/6G
- Technology Benchmarking and Comparison
- Glass versus organic substrates: performance, cost, manufacturing, application suitability
- Glass versus silicon interposers: technical metrics, economics, scalability
- Hybrid substrates analysis and cost-performance trade-offs
- Future technology roadmaps: materials, processes, integration complexity, performance projections
- End-User Market Analysis
- AI and high-performance computing: market sizing, requirements, key players, development trends
- Data centers and cloud computing: infrastructure demands, adoption patterns, opportunity assessment
- Telecommunications and 5G/6G: network evolution, RF requirements, integration challenges
- Automotive electronics: ADAS, electric vehicles, autonomous platforms, reliability requirements
- Consumer electronics: mobile devices, wearables, gaming systems
- Challenges and Opportunities
- Technical challenges: manufacturing maturity, yield issues, design complexity, standardization
- Economic challenges: cost competitiveness, investment requirements, customer adoption barriers
- Strategic opportunities: performance differentiation, new applications, technology convergence
- Future Outlook
- Technology evolution projections: next-generation materials, advanced manufacturing, integration advances
- Performance enhancement roadmap through 2036
- Market development scenarios: optimistic, conservative, and disruptive technology impacts
- 37 detailed company profiles spanning entire value chain with technology positioning, products, capabilities, and strategy including Absolics (SKC subsidiary), Intel Corporation, Samsung Electro-Mechanics (Semco), LG Innotek, AGC Inc., Corning Incorporated, SCHOTT AG, Nippon Electric Glass (NEG), LPKF Laser & Electronics, Applied Materials, Onto Innovation, AMD, NVIDIA, TSMC, Ibiden, Shinko, Unimicron Technology Corporation, AT&S Austria Technologie & Systemtechnik AG, Toppan, Advanced Semiconductor Engineering (ASE), Plan Optik AG, JNTC Co. Ltd., KCC Corporation, RENA Technologies GmbH, Philoptics, Samtec Inc., BOE, Chengdu ECHINT, Guangdong Fozhixin Microelectronics, Sky Semiconductor, WG Tech, Ajinomoto Co. Inc., DNP (Dai Nippon Printing), Alliance Material, 3D CHIPS, 3D Glass Solutions (3DGS), and Sumitomo Electric Industries Ltd. Each profile examines corporate strategy, technology positioning, product offerings, manufacturing capabilities, and competitive advantages within the rapidly evolving glass substrate ecosystem.
The report includes these components:
- PDF report download/by email. Print edition also available.
- Comprehensive Excel spreadsheet of all data.
- Mid-year Update
Payment methods: Visa, Mastercard, American Express, Paypal, Bank Transfer. To order by Bank Transfer (Invoice) select this option from the payment methods menu after adding to cart, or contact info@futuremarketsinc.com
1 EXECUTIVE SUMMARY
- 1.1 Glass Materials Overview 17
- 1.2 Applications of Glass in Semiconductors 19
- 1.3 Glass for Advanced Packaging 21
- 1.4 Technological Drivers and Material Advantages 21
- 1.5 Supply Chain Evolution and Manufacturing Readiness 22
- 1.6 Application Segments and Market Dynamics 23
- 1.6.1 Advanced Packaging and IC Substrates 23
- 1.6.2 Photonic Integration 23
- 1.6.3 High-Frequency Applications 24
- 1.7 Competitive Landscape and Strategic Positioning 24
- 1.8 Technical Challenges and Risk Factors 25
- 1.9 Investment and Adoption Outlook 26
- 1.10 Glass Used in Various Semiconductor Applications 26
- 1.11 Opportunities with Glass Packaging 29
- 1.12 Advantages of Glass Substrates 31
- 1.13 Challenges in Adopting Glass Substrates 34
- 1.14 Future Market Trends 37
- 1.14.1 Advanced Processing Technologies 37
- 1.14.2 Integrated Packaging Solutions & Sustainable Manufacturing Initiatives 39
- 1.15 Value Chain of Glass Substrate 40
- 1.15.1 Organic to Glass Core Substrate 42
- 1.16 Future Outlook 43
- 1.17 Material Innovations 45
- 1.18 Global Market Forecasts 2025-2036 47
- 1.18.1 Unit Shipment Forecast 2025-2036 47
- 1.18.1.1 Glass Carrier Shipments 47
- 1.18.1.2 Glass Core Substrate Shipments 48
- 1.18.1.3 Glass Interposer Shipments 49
- 1.18.2 Market Value Forecast 2025-2036 50
- 1.18.2.1 Glass Carrier Market Value 50
- 1.18.2.2 Glass Core Substrate Market Value 50
- 1.18.2.3 Glass Interposer Market Value 51
- 1.18.1 Unit Shipment Forecast 2025-2036 47
2 GLASS SUBSTRATES TECHNOLOGY FUNDAMENTALS
- 2.1 Glass Materials Properties 53
- 2.1.1 Borosilicate Glass Characteristics 54
- 2.1.2 Quartz Glass Properties 55
- 2.1.3 Specialty Glass Compositions 57
- 2.2 Manufacturing Processes 60
- 2.2.1 Glass Melting and Forming 60
- 2.2.2 Through Glass Via (TGV) Formation 61
- 2.2.3 Metallization and Build-up Processes 62
- 2.2.4 Panel-Level Processing Technologies 67
- 2.3 Design and Process Considerations 74
- 2.3.1 Thermal Management 74
- 2.3.2 Mechanical Stress Analysis 75
- 2.3.3 Electrical Performance Optimization 76
3 GLASS IN ADVANCED PACKAGING AND IC SUBSTRATES
- 3.1 Advanced Packaging Evolution 79
- 3.1.1 Dimensionality of Advanced Packaging 79
- 3.1.2 From 1D Semiconductor Packaging 81
- 3.1.3 Advanced Packaging 2D & 2D+ 82
- 3.1.4 Advanced Packaging 2.5D & 3D 84
- 3.1.5 Advanced Packaging 3.5D & 4D 87
- 3.1.6 Technology Development Trend for 2.5D and 3D Packaging 89
- 3.2 Packaging Architecture and Integration 90
- 3.2.1 Intel's Advanced Packaging Roadmap 90
- 3.2.2 Heterogeneous Integration Solutions 92
- 3.2.3 Overview of System on Chip (SOC) 94
- 3.2.4 Overview of Multi-Chip Module (MCM) 95
- 3.2.5 System in Package (SiP) 96
- 3.3 Glass IC Substrates Evolution 98
- 3.3.1 Glass IC Substrates 98
- 3.3.2 From Organic to Glass Core Substrate 99
- 3.3.3 Evolution of Packaging Substrates in Semiconductors 100
- 3.3.4 Organic Core Substrate vs. Glass Core Substrate 100
- 3.4 Through Glass Via Technology 102
- 3.4.1 TSV vs. TGV 103
- 3.4.2 Through Glass Via Formation 105
- 3.4.3 Comparison of Through Glass Via Formation Processes 105
- 3.4.4 TGV Process and Via Formation Methods 107
- 3.4.5 Mechanical and High-Power Laser Drilling 108
- 3.4.6 Laser-Induced Deep Etching 108
- 3.4.7 LMCE from BSP 109
- 3.4.8 Philoptics' TGV Technology 109
- 3.4.9 Laser-Induced Modification and Advanced Wet Etching 110
- 3.4.10 Photosensitive Glass and Wet Etching 112
- 3.4.11 Samtec's TGV Technology 112
- 3.4.12 TGV of High Aspect Ratio 112
- 3.5 TGV Metallization and Processing 114
- 3.5.1 TGV Metallization 114
- 3.5.2 Two-Step Process 117
- 3.5.3 Seed Layer Deposition in TGV Metallization 117
- 3.6 Material Properties and Performance 120
- 3.6.1 Material Property Comparison for Advanced Packaging 120
- 3.6.2 Key Mechanical and Reliability Benefits of Glass 121
- 3.6.3 I/O Density 122
- 3.6.4 Key Factors Enabling Fine Circuit Patterns on Glass Substrates 123
- 3.6.5 Fine Circuit Patterning Reduces DoF 124
- 3.6.6 FC-BGA Substrates Lead to Larger Distortions 124
- 3.7 Traditional Substrate Limitations 125
- 3.7.1 Limitations of Via Formation 125
- 3.7.2 SAP Method Limitations 126
- 3.7.3 PCB Stack-ups 128
- 3.7.4 Traditional Multilayer vs. Build-up PCBs 128
- 3.7.5 Build-up Material: ABF 131
- 3.7.6 Flip Chip Ball Grid Array (FC-BGA) Substrate 132
- 3.8 Glass Core Substrate Technologies 133
- 3.9 Glass Substrate Manufacturing 138
- 3.9.1 Glass Substrate Manufacturing 138
- 3.9.2 Core Layer Fabrication 140
- 3.9.3 Build-up Layer Fabrication 140
- 3.9.4 Manufacturing Process of Glass Substrate (CHIMES) 141
- 3.9.5 Achieving 2/2 μm L/S on Glass Substrate 143
- 3.10 Advanced Manufacturing Processes 144
- 3.10.1 Intel's Glass Line 146
- 3.11 Industry Implementation and Innovation 147
- 3.11.1 Features of Glass-based Advanced Packaging and IC Substrates 147
- 3.11.2 Advanced Thermal Management for Glass Packages 148
- 3.11.3 Glass Innovation 149
4 GLASS IN PHOTONICS
- 4.1 Photonic Integration 154
- 4.1.1 Overview 154
- 4.1.2 Optical Coupling - I/O 155
- 4.1.3 EIC/PIC Integration 156
- 4.2 Co-Packaged Optics 156
- 4.2.1 Co-Packaged Optics 156
- 4.2.2 Key Trend of Optical Transceiver 158
- 4.2.3 Glass-Based CPO Integration 159
- 4.3 Glass Waveguide Technologies 159
- 4.3.1 Ion Exchange Waveguide Formation Technology 160
- 4.3.2 Adiabatic Glass-to-Silicon Waveguide Coupling for CPO Integration 161
- 4.3.3 Glass-Based Fiber Connector Assembly for CPO Applications 162
- 4.4 Manufacturing and Integration Processes 163
- 4.4.1 Glass Interposer Manufacturing Process and Laser Separation Technology 163
- 4.4.2 Corning's High-Density 102.4 Tb/s Glass Integration Platform 164
- 4.4.3 3D Integration of EIC/PIC with a Glass Interposer 164
- 4.4.4 3D Integration of EIC, PIC, ASIC on a Co-Packaged Glass Substrate 164
- 4.4.5 Fabrication Process of the 3D Integration of ASIC, EIC, PIC on a Co-Packaged Substrate 165
- 4.4.6 Advancements in Glass Integration for Photonics 165
5 GLASS IN HIGH-FREQUENCY APPLICATIONS
- 5.1 High-Frequency Material Requirements 167
- 5.1.1 Applications of Low-Loss Materials in Semiconductor and Electronics Packaging 167
- 5.1.2 Transmission Loss in High-Frequency PCB Design 168
- 5.1.3 Glass as a Low-Loss Material 169
- 5.2 Material Benchmarking and Performance 171
- 5.2.1 Benchmark of LTCC and Glass Materials 171
- 5.2.2 Dielectric Constant: Stability vs Frequency for Different Inorganic Substrates (LTCC, Glass) 173
- 5.2.3 Benchmarking of Commercial Low-Loss Materials for 5G PCBs/Components 174
- 5.3 Glass Suppliers and Products 177
- 5.4 RF Applications and Implementations 182
- 5.4.1 Glass as a Filter Substrate 182
- 5.4.2 Glass Integrated Passive Devices (IPD) Filter for 5G by Advanced Semiconductor Engineering 182
- 5.4.3 Glass Substrate AiP for 5G 182
- 5.4.4 Glass for 6G 183
- 5.4.5 Glass Interposers for 6G 183
6 TECHNOLOGY BENCHMARKING AND COMPARISON
- 6.1 Glass vs Organic Substrates 185
- 6.1.1 Performance Comparison 185
- 6.1.2 Cost Analysis 185
- 6.1.3 Manufacturing Considerations 186
- 6.1.4 Application Suitability 187
- 6.2 Glass vs Silicon Interposers 188
- 6.2.1 Technical Performance Metrics 188
- 6.2.2 Economic Comparison 189
- 6.2.3 Scalability Assessment 190
- 6.3 Hybrid Substrates 192
- 6.3.1 Glass-Organic Hybrid Designs 192
- 6.3.2 Multi-Material Integration 192
- 6.3.3 Performance Optimization 193
- 6.3.4 Cost-Performance Trade-offs 194
- 6.4 Future Technology Roadmaps 196
- 6.4.1 Material Innovation Trends 196
- 6.4.2 Process Technology Evolution 199
- 6.4.3 Integration Complexity Growth 202
- 6.4.4 Performance Projection Models 202
7 END-USER MARKET ANALYSIS
- 7.1 AI and High-Performance Computing 205
- 7.1.1 Market Size and Growth Drivers 205
- 7.1.2 Technology Requirements 205
- 7.1.3 Key Players and Products 207
- 7.1.4 Future Development Trends 208
- 7.2 Data Centers and Cloud Computing 210
- 7.2.1 Infrastructure Scaling Demands 210
- 7.2.2 Performance and Efficiency Requirements 211
- 7.2.3 Technology Adoption Patterns 212
- 7.2.4 Market Opportunity Assessment 214
- 7.3 Telecommunications and 5G/6G 215
- 7.3.1 Network Infrastructure Evolution 215
- 7.3.2 RF Component Requirements 217
- 7.3.3 Technology Integration Challenges 218
- 7.4 Automotive Electronics 220
- 7.4.1 Advanced Driver Assistance Systems 220
- 7.4.2 Electric Vehicle Electronics 221
- 7.4.3 Autonomous Driving Platforms 223
- 7.4.4 Reliability and Safety Requirements 225
- 7.5 Consumer Electronics 227
- 7.5.1 Mobile Device Applications 227
- 7.5.2 Wearable Technology Integration 228
- 7.5.3 Gaming and Entertainment Systems 230
8 CHALLENGES AND OPPORTUNITIES
- 8.1 Technical Challenges 232
- 8.1.1 Manufacturing Process Maturity 232
- 8.1.2 Yield and Reliability Issues 232
- 8.1.3 Design and Integration Complexity 234
- 8.1.4 Standardization Requirements 235
- 8.2 Economic and Market Challenges 237
- 8.2.1 Cost Competitiveness 237
- 8.2.2 Investment Requirements 239
- 8.2.3 Customer Adoption Barriers 239
- 8.3 Strategic Opportunities 241
- 8.3.1 Performance Differentiation 241
- 8.3.2 New Application Development 244
- 8.3.3 Technology Convergence Benefits 247
9 FUTURE OUTLOOK
- 9.1 Technology Evolution Projections 249
- 9.1.1 Next-Generation Material Developments 249
- 9.1.2 Advanced Manufacturing Processes 252
- 9.1.3 Integration Technology Advances 255
- 9.1.4 Performance Enhancement Roadmap 258
- 9.2 Market Development Scenarios 260
- 9.2.1 Optimistic Growth Scenario 260
- 9.2.2 Conservative Growth Scenario 261
- 9.2.3 Disruptive Technology Impact 261
10 COMPANY PROFILES 263
- 10.1 3D CHIPS 263
- 10.2 3D Glass Solutions (3DGS) 265
- 10.3 Absolics (SKC) 266
- 10.4 Advanced Semiconductor Engineering (ASE) 269
- 10.5 AGC Inc. (formerly Asahi Glass) 271
- 10.6 Ajinomoto Co., Inc. 272
- 10.7 Alliance Material 273
- 10.8 AMD (Advanced Micro Devices) 274
- 10.9 Applied Materials, Inc. 276
- 10.10 AT&S Austria Technologie & Systemtechnik AG 277
- 10.11 BOE 279
- 10.12 Chengdu ECHINT (Echoing Electronics) 282
- 10.13 Corning Incorporated 284
- 10.14 DNP (Dai Nippon Printing Co., Ltd.) 285
- 10.15 Guangdong Fozhixin Microelectronics 286
- 10.16 Ibiden 288
- 10.17 Intel Corporation 289
- 10.18 JNTC Co., Ltd. 292
- 10.19 KCC Corporation 294
- 10.20 LG Innotek 295
- 10.21 LPKF Laser & Electronics 297
- 10.22 Nippon Electric Glass (NEG) 298
- 10.23 NVIDIA Corporation 299
- 10.24 Onto Innovation 301
- 10.25 Philoptics 302
- 10.26 Plan Optik AG 303
- 10.27 RENA Technologies GmbH 304
- 10.28 Samsung Electro-Mechanics (Semco) 305
- 10.29 Samtec Inc. 306
- 10.30 SCHOTT AG 308
- 10.31 Shinko 309
- 10.32 Sky Semiconductor 311
- 10.33 Sumitomo Electric Industries, Ltd. 313
- 10.34 Toppan 315
- 10.35 TSMC (Taiwan Semiconductor Manufacturing Company) 317
- 10.36 Unimicron Technology Corporation 320
- 10.37 WG Tech (Wuxi Gaojing Technology) 322
11 APPENDICES
- 11.1 Technical Glossary and Definitions 324
- 11.2 Technology Evolution Timeline 328
- 11.3 Research Approach and Framework 332
- 11.3.1 Research Objectives 332
- 11.3.2 Research Methodology Overview 332
- 11.3.2.1 Primary Research Methods 332
- 11.3.2.2 Secondary Research Methods 332
12 REFERENCES 334
List of Tables
- Table 1. Global Glass Substrates Market Size 2026-2036 (Revenue & Volume). 18
- Table 2. Applications of Glass in Semiconductors. 19
- Table 3. Technology readiness levels (TRLs) glass semiconductor applications. 27
- Table 4. Opportunities with Glass Packaging. 29
- Table 5. Key Advantages of Glass Substrates. 32
- Table 6. Challenges in Adopting Glass Substrates. 35
- Table 7. Future Market Trends. 37
- Table 8. Advanced Processing Technologies. 38
- Table 9. Material Innovations. 45
- Table 10. Glass Carrier Unit Shipment Forecast 2025-2036. 47
- Table 11. Glass Core Substrate Unit Shipment Forecast 2025-2036. 48
- Table 12. Glass Interposer Unit Shipment Forecast 2025-2036. 49
- Table 13. Glass Carrier Market Value Forecast 2025-2036. 50
- Table 14. Glass Core Substrate Market Value Forecast 2025-2036. 51
- Table 15. Glass Interposer Market Value Forecast 2025-2036. 52
- Table 16. Glass Materials Properties. 53
- Table 17. Borosilicate Glass Characteristics. 54
- Table 18. Quartz Glass Properties. 56
- Table 19. Specialty Glass Compositions. 57
- Table 20. Glass Material Property Comparison Matrix. 59
- Table 21. Metallization and Build-up Processes. 64
- Table 22. Panel-Level Processing Technologies. 69
- Table 23. Comparative Analysis: Panel vs Wafer-Level Processing. 72
- Table 24. Organic Core Substrate vs. Glass Core Substrate 101
- Table 25. TSV vs. TGV Comparison. 104
- Table 26. Comparison of Through Glass Via Formation Processes. 106
- Table 27. TGV Process and Via Formation Methods. 107
- Table 28. Comparison Among the TGV Processes. 111
- Table 29. TGV Metallization Processes. 116
- Table 30. Factors for Alternative TGV Metallization Process 118
- Table 31. Comparison of TGV Metallization Processes 119
- Table 32. Material Property Comparison for Advanced Packaging 121
- Table 33. Key Mechanical and Reliability Benefits of Glass. 122
- Table 34. Key Factors Enabling Fine Circuit Patterns on Glass Substrates. 123
- Table 35. SAP Method Limitations. 127
- Table 36. Traditional Multilayer vs. Build-up PCBs. 130
- Table 37. Glass Core Substrate Technologies. 135
- Table 38. Glass Interposer vs. Silicon Interposer. 137
- Table 39. Organic Core Substrate vs. Glass Core Substrate. 138
- Table 40. Advanced Manufacturing Process Capabilities. 145
- Table 41. Advanced Thermal Management for Glass Packages. 148
- Table 42. Advanced Packaging Technology Comparison. 151
- Table 43. Dual-Mode Glass Waveguide Performance Characteristics. 160
- Table 44. Advancements in Glass Integration for Photonics. 166
- Table 45. Applications of Low-Loss Materials in Semiconductor and Electronics Packaging. 167
- Table 46. Categories of RF Applications Enabled by Glass in Semiconductor Technology. 170
- Table 47. Benchmark of LTCC and Glass Materials. 171
- Table 48. Dielectric Constant Stability vs Frequency for Different Inorganic Substrates. 173
- Table 49. Benchmarking of Commercial Low-Loss Materials for 5G PCBs/Components. 174
- Table 50. Glass Suppliers and Products. 179
- Table 51. Technical Performance Metrics - Glass vs Silicon Interposers. 188
- Table 52. Economic Comparison - Glass vs Silicon Interposers. 189
- Table 53. Scalability Assessment - Glass vs Silicon Interposers. 191
- Table 54. Performance Projection Models (2025-2036). 203
- Table 55. Technology Requirements - AI/HPC Glass Substrate Packages. 206
- Table 56. Key Players and Products - AI/HPC Glass Substrates 207
- Table 57. Future Development Trends - AI/HPC Glass Substrates. 209
- Table 58. Infrastructure Scaling Demands - Data Center Glass Substrates. 210
- Table 59. Performance and Efficiency Requirements - Data Center Glass Substrates 211
- Table 60. Technology Adoption Patterns - Data Center Glass Substrates. 213
- Table 61. Market Opportunity Assessment - Data Center Glass Substrates. 214
- Table 62. Network Infrastructure Evolution - Telecom Glass Substrates. 216
- Table 63. RF Component Requirements - 5G/6G Glass Substrates. 217
- Table 64. Technology Integration Challenges - Telecom Glass Substrates. 219
- Table 65. Advanced Driver Assistance Systems - Glass Substrate Requirements. 220
- Table 66. Electric Vehicle Electronics - Glass Substrate Applications. 222
- Table 67. Performance Metrics. 223
- Table 68. Autonomous Driving Platforms - Glass Substrate Requirements 223
- Table 69. Autonomous Driving Platforms - Glass Substrate Requirements 225
- Table 70. Reliability and Safety Requirements - Automotive Glass Substrates. 226
- Table 71. Mobile Device Applications - Glass Substrate Opportunities. 227
- Table 72. Wearable Technology Integration - Glass Substrate Applications. 228
- Table 73. Development Status. 229
- Table 74. Technology Requirements by Application. 229
- Table 75. Gaming and Entertainment Systems - Glass Substrate Applications. 230
- Table 76. Performance Metrics. 231
- Table 77. Yield and Reliability Issues - Glass Substrates. 233
- Table 78. Standardization Requirements - Glass Substrates. 235
- Table 79. Cost Competitiveness - Glass vs Organic Substrates. 237
- Table 80. Cost Trajectory by Substrate Size. 238
- Table 81. Customer Adoption Barriers - Glass Substrates. 240
- Table 82. Performance Differentiation Opportunities - Glass Substrates. 242
- Table 83. Competitive Positioning by Market Segment: 243
- Table 84. New Application Development - Glass Substrate Enabled Markets. 244
- Table 85. Total Addressable Market Expansion. 246
- Table 86. Technology Convergence Benefits - Glass Substrate Integration. 247
- Table 87. Next-Generation Material Developments - Glass Substrates. 250
- Table 88. Advanced Manufacturing Processes - Glass Substrates. 253
- Table 89. Integration Technology Advances - Glass Substrates. 256
- Table 90. Performance Enhancement Roadmap - Glass Substrates. 258
- Table 91. Technical Glossary and Definitions. 324
- Table 92. Technology Evolution Timeline - Glass Substrates for Semiconductors. 328
- Table 93. Key Technology Readiness Level (TRL) Progression. 331
List of Figures
- Figure 1. Intel's semiconductor glass substrate. 17
- Figure 2. SKC glass substrate prototype. 21
- Figure 3. Example of RF IPD balun on Glass Substrate. 24
- Figure 4. Value Chain of Glass Substrate for Semiconductors. 41
- Figure 5. Comparison of organic and glass core substrates . 42
- Figure 6. Cross-sectional diagram of glass substrate with through glass vias. 61
- Figure 7. ASE’s fan-out chip on substrate module features tall copper pillars (10µm diameter, 120µm tall), tight die-die spacing, and clean underfill. 68
- Figure 8. Manufacturing process for glass interposers. 80
- Figure 9. 2D chip packaging. 83
- Figure 10. Typical structure of 2.5D IC package utilizing interposer. 85
- Figure 11. 3D Glass Panel Embedding (GPE) package. 86
- Figure 12. The industry roadmap for the transition of substrates from organic (top) to glass (bottom) and the path to 1µm L/S. 91
- Figure 13. System-in-Package (SiP) architecture. 97
- Figure 14. X-ray image of TGV in the glass core substrate. 113
- Figure 15. Silver printing on alumina & Copper coated on glass. 114
- Figure 16. Stacked glass architecture uses uncured ABF dielectric as adhesive, laser via drilling, and copper electroless seed/electroplated fill. 129
- Figure 17. Flip Chip Ball Grid Array (FCBGA). 132
- Figure 18. High-End Performance Packaging vom Wafer bis zum System. 142
- Figure 19. Photonic Integrated Circuit (PIC). 154
- Figure 20. Co-Packaged Optics concept. 157
- Figure 21. Process steps for co-packaged fabrication and assembly. 158
- Figure 22. Simplified flow for N=2, N=3 and N=4 collective die-to-wafer transfer. 162
- Figure 23. JNTC 510x515mm through silicon via (TGV) glass substrate. 163
- Figure 24. Material Innovation Trends Roadmap. 198
- Figure 25. Process Technology Evolution Roadmap. 201
- Figure 26. Technology Roadmap in Automotive Electronics. 221
- Figure 27. Absolics' glass substrate 266
- Figure 28. Glass substrate test units at Intel’s Assembly and Test Technology Development factory. 289
- Figure 29. JNTC Next-Generation Glass Substrate for Semiconductors. 292
The report includes these components:
- PDF report download/by email. Print edition also available.
- Comprehensive Excel spreadsheet of all data.
- Mid-year Update
Payment methods: Visa, Mastercard, American Express, Paypal, Bank Transfer. To order by Bank Transfer (Invoice) select this option from the payment methods menu after adding to cart, or contact info@futuremarketsinc.com