DRAM Market 2026-2036 | HBM, DDR5, AI Memory Forecast

The DRAM industry is undergoing its most consequential structural shift in decades. The explosion of AI training and inference workloads has elevated high-bandwidth memory (HBM) from a specialist product into the single most strategically important segment of the memory market, with supply allocation now directly shaping the competitive position of every major AI accelerator vendor. Samsung, SK hynix and Micron are racing to scale HBM3E and HBM4 capacity, while DDR5, LPDDR5X and emerging compute express link (CXL) memory architectures are simultaneously reshaping mainstream server, PC and mobile demand.

Geopolitical pressures are reshaping the supply landscape in parallel. US export controls on advanced semiconductor manufacturing equipment, China’s accelerated investment in domestic DRAM capacity through CXMT and others, Korea’s continued dominance of HBM production, and the strategic role of Taiwan-based packaging are creating a memory supply chain that looks fundamentally different from the cyclical commodity market of previous decades. Pricing dynamics, capacity decisions and bit growth forecasts now hinge as much on policy and AI demand projections as on traditional supply-demand cycles.

This report provides a complete strategic intelligence resource on the global DRAM market — including 10-year forecasts by product type (HBM, DDR4, DDR5, LPDDR, GDDR), end-use application (AI data centres, traditional servers, PCs, smartphones, automotive, industrial), regional production and demand analysis, technology roadmaps covering HBM4 and beyond, supply chain and capacity analysis, and detailed profiles of leading DRAM manufacturers and emerging Chinese entrants.

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Technology | Markets | Players | Forecasts to 2036. Covering DRAM · DDR · HBM · 3D DRAM · CBA · Advanced Packaging

Published: April 2026
Pages: 497
Tables: 44
Figures: 70

The global DRAM market stands at one of the most consequential inflection points in its four-decade history. Driven by the explosive growth of artificial intelligence, generative AI workloads, and hyperscale data centre expansion, the industry is experiencing a structural demand shift that is fundamentally reshaping its economics, technology roadmaps, and competitive dynamics. After years of cyclical boom-and-bust patterns defined by commodity pricing and overcapacity, DRAM is transitioning into a more stratified market — one where high-performance memory commands significant price premiums and where a small number of technologically advanced suppliers hold enormous leverage.

At the centre of this transformation is High-Bandwidth Memory. HBM has evolved from a niche product serving graphics applications into the critical enabling technology for AI accelerators from Nvidia, AMD, Google, and the major hyperscalers. Demand for HBM has consistently outpaced supply since 2023, and this imbalance is expected to persist well into the latter half of the decade. SK hynix has established early leadership, Samsung is aggressively pursuing differentiation through next-generation architectures, and Micron is executing a focused catch-up strategy. The arrival of HBM4, delivering bandwidths exceeding two terabytes per second, and the emergence of custom HBM solutions co-designed with specific AI silicon, are redefining what memory means in a modern compute system.

Conventional DRAM — spanning DDR5, LPDDR5X, and GDDR7 — continues to grow in volume, supported by robust demand across PCs, smartphones, servers, and automotive electronics. The server segment in particular is experiencing sustained growth as AI inference infrastructure scales globally. DDR6 development is underway at all three major suppliers, with commercialisation expected in the early 2030s. The transition to lower process nodes, including the adoption of extreme ultraviolet lithography and novel capacitor materials, is enabling continued density scaling while managing the physical limits of planar cell architectures.

The supply side of the market is concentrated among three manufacturers — Samsung Electronics, SK hynix, and Micron Technology. China's ambitions to build a domestic memory industry, led by CXMT and JHICC, represent a long-term wildcard, though US export controls and technology access restrictions continue to constrain progress. The evolution of CMOS-bonded array architectures, in which the DRAM array and peripheral circuits are fabricated separately and joined via hybrid bonding, is becoming a key manufacturing inflection point that will separate the leaders from the laggards through the end of the decade.

Looking further ahead, 3D DRAM represents the industry's most ambitious long-term bet. Moving beyond planar scaling entirely, 3D DRAM promises significant density and performance gains, but commercialisation remains challenging, with realistic mass production scenarios now pointing toward the 2032–2035 timeframe. Its arrival will have profound implications for the DRAM equipment market, creating new demands for deposition, etch, and bonding tools while rendering some existing process steps obsolete.

By 2027, total DRAM market revenues are forecast to approach 400 billion dollars, an unprecedented milestone for the industry. Looking to 2036, the market will be defined by the interplay between AI-driven HBM demand, the maturation of 3D DRAM, the rise of memory-compute integration, and the strategic contest between established incumbents and emerging Chinese players. For investors, technology leaders, and supply chain participants, understanding these forces is no longer optional — it is essential.

The Global DRAM Market 2026–2036 is the most comprehensive independent analysis of the global DRAM industry available today. Spanning approximately 496 pages, this definitive market intelligence report combines granular market forecasting, in-depth technology assessment, competitive analysis, and supply chain mapping to provide decision-makers with the complete picture of where the DRAM market has been, where it stands today, and where it is heading over the next decade.

The report covers the full spectrum of DRAM technologies — from mainstream DDR5 and LPDDR5X through to the rapidly evolving High-Bandwidth Memory landscape and the long-horizon promise of 3D DRAM. Market forecasts are presented through to 2036 and encompass revenue, bit shipments, average selling prices, wafer production volumes, and capital expenditure, all broken down by technology segment, supplier, and end market. Dedicated sections address the HBM market in exceptional detail, including a generation-by-generation revenue and shipment breakdown from HBM2E to HBM5E, custom HBM architectures and customer-level demand analysis, and a comprehensive view of China's nascent HBM ecosystem.

The technology chapters provide a thorough examination of DRAM scaling challenges and the engineering solutions being deployed to address them, including EUV lithography adoption, novel dielectric and capacitor materials, buried wordline transistor designs, and CMOS-bonded array architectures. Supplier-specific technology roadmaps for Samsung, SK hynix, and Micron are presented alongside cross-supplier comparisons, enabling readers to benchmark innovation trajectories and anticipated product timelines. Advanced packaging — including TSV technology, hybrid bonding for HBM and CBA DRAM, and memory-logic heterogeneous integration — is examined in depth, reflecting its growing strategic importance.

The competitive landscape is addressed through dedicated analysis of Samsung, SK hynix, and Micron, as well as a thorough assessment of China's DRAM industry including CXMT, JHICC, and the domestic supply chain. Market share data, financial benchmarking, merger and acquisition activity, and strategic positioning are all covered. The report concludes with 109 individual company profiles spanning the entire DRAM ecosystem — from memory manufacturers and packaging houses to equipment suppliers, material producers, IP licensors, and end-market customers.

This report is designed for semiconductor executives, technology strategists, investment analysts, equipment and materials suppliers, government and policy advisors, and anyone with a professional stake in the future of the global memory industry. It is produced by analysts with deep expertise in semiconductor technology and market forecasting, drawing on proprietary data, primary research, and rigorous bottom-up modelling.

Report contents include:

Front Matter — Glossary, methodology, scope, author profiles, companies cited, forecast revision analysis, three-page summary, and executive summary
Chapter 1 — Context — DRAM market overview, AI supercycle analysis, historical cyclicality from 1982 to 2026, market segmentation, and geopolitical environment
Chapter 2 — Market Forecasts — Full DRAM forecasts to 2036 covering revenue, bit shipments, ASP, capex, and wafer production; dedicated HBM forecasts by generation, customer, and architecture (standard vs. custom)
Chapter 3 — Introduction to DRAM Technology and Business — History of DRAM scaling milestones, interface standards evolution, industry consolidation, pricing cycles, and supplier economics
Chapter 4 — Players and Market Share — Global market share analysis, Samsung/SK hynix/Micron deep dives, M&A activity, ecosystem mapping, and competitive positioning matrix
Chapter 5 — Memory Business in China — CXMT and JHICC technology status and capacity ramp, China HBM initiatives, impact of US export controls, and domestic supply chain assessment
Chapter 6 — DRAM Technology Trends — Scaling challenges, EUV adoption, capacitor and transistor innovation, novel materials, and full supplier technology roadmaps covering DDR5, DDR6, LPDDR5X, and GDDR7
Chapter 7 — High-Bandwidth Memory (HBM) — HBM architecture, bandwidth evolution, competitive landscape, supplier strategies, HBM4 specifications, custom HBM, AI customer demand analysis, China HBM, and reliability considerations
Chapter 8 — 3D DRAM — R&D activity by player, recent prototypes, technology readiness, patent landscape with curated patent list, commercialisation scenarios, and long-term market evolution to 2038
Chapter 9 — Leading-Edge DRAM Manufacturing — Global fab map, wafer production by node and supplier, greenfield investment projects, yield trends, equipment market forecast by process step, key equipment suppliers, and materials market outlook
Chapter 10 — Advanced Packaging for DRAM — TSV technology, hybrid bonding, CBA architecture, die-to-wafer vs. wafer-to-wafer bonding, heterogeneous memory-logic integration, and AI system architecture evolution
Company Profiles — The report includes individual profiles for 109 companies spanning the entire global DRAM ecosystem including ACM Research, Adata Technology, Advantest, Alibaba DAMO Academy, Alliance Memory, Alphabet (Google), AMEC, AP Memory Technology, Apacer Technology, Apple, Applied Materials, ASE Group, ASML, Avalanche Technology, BeSang, Buffalo Technology, Canon Semiconductor Equipment, CXMT, Cisco Systems, Dell Technologies, Dosilicon, Etron Technology, ESMT, Everspin Technologies, Ferroelectric Memory Company, Fujitsu, GigaDevice Semiconductor, GlobalFoundries, HHGrace, Hikstor Technology, Hitachi, HLMC, HP Inc., Huawei, IBM, ICLeague Technology, IMEC, IMECAS, Infineon Technologies, Innostar Semiconductor, Intel, ISSI, Jasminer, JHICC, Kingston Technology, KLA Corporation, Lam Research, Lenovo, Longsys Electronics, Liteon Technology, Macronix International, Materion, Micron Technology and more......

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Comprehensive Excel spreadsheet of all data.
Mid-year Update

The Global DRAM Market

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The Global DRAM Market 2026-2036

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FRONT MATTER

Disclaimer & Legal Notice i
Glossary and Definitions ii
Objectives of This Report iv
Scope of This Report v
Methodology and Definitions vii
About the Authors ix
Companies Cited in This Report x
What We Got Wrong, What We Got Right xi
2026 vs. 2025 – Forecast Comparison xii
Three-Page Summary xiv
Executive Summary 1

Chapter 1 — The Global DRAM Market Overview 15

1.1 DRAM Market Overview and Macro Drivers 16
1.2 AI Supercycle and the Road to $400B 19
1.3 DRAM Market Cyclicality – Historical Perspective (1982–2026) 22
1.4 Market Segmentation: Conventional DRAM vs. HBM vs. Emerging 26
1.5 Geopolitical and Trade Environment 29

Chapter 2 — Market Forecasts 35

2.1 DRAM Market Forecast 36
- 2.1.1 Revenue Forecast by Segment (2022–2036) 37
- 2.1.2 Bit Shipment and Bit Demand Forecasts 40
- 2.1.3 Average Selling Price (ASP) Forecast by Technology 43
- 2.1.4 Capex Forecast by Supplier 46
- 2.1.5 Wafer Production Forecast (Device and Base Logic) 49
- 2.1.6 CBA Architecture Adoption and Impact on Supply 52
2.2 HBM Market Forecast 55
- 2.2.1 HBM Revenue Forecast by Generation (HBM2E–HBM5E) 56
- 2.2.2 HBM Bit Shipment Forecast 59
- 2.2.3 HBM Wafer Demand: Standard vs. Custom HBM 62
- 2.2.4 HBM Customer-Level Demand Breakdown 65
- 2.2.5 Standard vs. Custom HBM Revenue Split (2024–2030) 68
- 2.2.6 China HBM Ecosystem and Capacity Outlook 71
- 2.2.7 HBM Generation Mix: Transition Timelines and Adoption Rates 74

Chapter 3 — Introduction to DRAM Technology and Business 81

3.1 A Brief History of DRAM Technology 82
- 3.1.1 From 1T1C to Sub-10nm Nodes: Key Milestones 83
- 3.1.2 Cell Architecture Evolution and Scaling Challenges 86
- 3.1.3 Interface Standards: From SDRAM to DDR5 and Beyond 88
3.2 DRAM Business – A Historical Overview 92
- 3.2.1 Industry Structure and Consolidation (1985–2026) 93
- 3.2.2 Revenue, Gross Margin, and Capex Trends by Supplier 96
- 3.2.3 Pricing Cycles and Supply-Demand Dynamics 100
- 3.2.4 DRAM Industry Economics and Return on Investment 104

Chapter 4 — Players and Market Share 109

4.1 Global DRAM Market Share by Supplier (2024–2026) 110
4.2 Samsung Electronics – Strategy, Financials, and Roadmap 113
4.3 SK hynix – Strategy, Financials, and HBM Leadership 116
4.4 Micron Technology – Strategy, Financials, and Roadmap 119
4.5 M&As, Partnerships, and Noteworthy News (2022–2026) 122
4.6 DRAM Ecosystem and Supply Chain Overview 126
4.7 Competitive Positioning Matrix 130

Chapter 5 — Memory Business in China – Focus on DRAM 133

5.1 China DRAM Industry Overview 134
5.2 CXMT – Technology Status, Roadmap, and Capacity Ramp 137
5.3 JHICC – Progress Update and Strategic Direction 141
5.4 China HBM Initiatives: HBM3/3E Progress and Ecosystem 144
5.5 Impact of US Export Controls on China DRAM 148
5.6 China DRAM Wafer Production Forecast (2024–2030) 152
5.7 China Supply Chain: Equipment, Materials, and EDA 155

Chapter 6 — DRAM Technology Trends 159

6.1 DRAM Scaling – Challenges and Solutions 160
- 6.1.1 Bit Cell Structure Evolution and Scaling Limits 161
- 6.1.2 Capacitor Scaling: Materials and Novel Structures 164
- 6.1.3 Transistor Scaling: Buried Wordline and Vertical Designs 167
- 6.1.4 Lithography: EUV Adoption Roadmap for DRAM 170
- 6.1.5 Novel Materials: High-k Dielectrics and Metal Gates 173
6.2 Technology Roadmaps and Key Trends 178
- 6.2.1 Samsung DRAM Technology Roadmap (2024–2030) 179
- 6.2.2 SK hynix DRAM Technology Roadmap (2024–2030) 182
- 6.2.3 Micron DRAM Technology Roadmap (2024–2030) 185
- 6.2.4 DDR5 Ramp and DDR6 Development Outlook 188
- 6.2.5 LPDDR5X and Mobile DRAM Trends 191
- 6.2.6 GDDR7 and Graphics Memory Roadmap 194

Chapter 7 — High-Bandwidth Memory (HBM) 201

7.1 HBM Overview: Architecture, Performance, and Use Cases 202
7.2 HBM Bandwidth Evolution: From HBM1 to HBM5 (>2 TB/s) 206
7.3 HBM Market Share and Competitive Landscape (2023–2028) 210
7.4 SK hynix HBM Strategy, Products, and Roadmap 214
7.5 Samsung HBM Strategy, Products, and Roadmap 218
7.6 Micron HBM Strategy, Products, and Roadmap 222
7.7 Custom HBM (cHBM): Architecture, Players, and Adoption 226
7.8 HBM4 and Beyond: Key Specifications and Integration Schemes 231
7.9 HBM Wafer Capacity Allocation and Impact on Standard DRAM 235
7.10 HBM in AI Systems: Nvidia, Google, AMD, and Hyperscaler Demand 239
7.11 China HBM Ecosystem: Progress, Gaps, and Outlook 244
7.12 HBM Reliability, Testing, and Packaging Considerations 248

Chapter 8 — 3D DRAM 253

8.1 R&D Activities for 3D DRAM 254
- 8.1.1 3D DRAM Concept Architectures and Industry Approaches 255
- 8.1.2 Recent Prototypes and Technology Readiness Assessment 258
- 8.1.3 Key Players in 3D DRAM R&D (Samsung, SK hynix, Micron, IMEC) 262
- 8.1.4 3D DRAM vs. 2D DRAM: Performance and Density Comparison 265
- 8.1.5 Revised Commercialisation Timelines and Scenarios 268
8.2 IP Landscape – List of Relevant Patents 272
- 8.2.1 3D DRAM Patent Filings by Year (2010–2025) 273
- 8.2.2 Top Patent Holders and Key Claims 276
- 8.2.3 Curated List of Relevant 3D DRAM Patents 279
8.3 Long-Term Market Evolution Scenario (2030–2038) 282
- 8.3.1 3D DRAM Market Share Scenarios 283
- 8.3.2 Impact of 2D-to-3D Transition on the DRAM Equipment Market 287
- 8.3.3 Long-Term Revenue and Wafer Forecast Including 3D DRAM 291

Chapter 9 — Leading-Edge DRAM Manufacturing 295

9.1 DRAM Fabs and Wafer Production 296
- 9.1.1 Global DRAM Fab Map and Installed Capacity (2025) 297
- 9.1.2 Wafer Production by Supplier and Node (2022–2030) 301
- 9.1.3 Fab Expansion Projects and New Greenfield Investments 305
- 9.1.4 Leading-Edge Node Definitions and Comparisons by Supplier 309
- 9.1.5 Yield Ramp and Manufacturing Efficiency Trends 312
9.2 Equipment and Materials for DRAM Manufacturing 317
- 9.2.1 DRAM Equipment Market Forecast (2022–2030) 318
- 9.2.2 Equipment Spend by Process Step (Litho, Etch, Deposition, CMP) 322
- 9.2.3 Key Equipment Suppliers and Competitive Landscape 326
- 9.2.4 DRAM Materials Market: Key Segments, Suppliers, and Forecasts 330
- 9.2.5 CMP, Cleaning, and Specialty Chemical Demand Outlook 334

Chapter 10 — Advanced Packaging for DRAM 339

10.1 3D Stacking – Focus on Bonding Technologies 340
- 10.1.1 TSV Technology Overview and Roadmap for DRAM 341
- 10.1.2 Hybrid Bonding: Technology Status and DRAM Adoption 344
- 10.1.3 CBA DRAM: Array/Periphery Bonding Architecture 348
- 10.1.4 Die-to-Wafer vs. Wafer-to-Wafer Bonding for HBM 352
- 10.1.5 Advanced DRAM Packaging Roadmap (2023–2030) 355
10.2 Memory-Logic Heterogeneous Integration 359
- 10.2.1 Memory-Compute Integration: Architectures and Taxonomy 360
- 10.2.2 AI Accelerator + HBM System Architecture Evolution 364
- 10.2.3 Near-Memory and In-Memory Computing: Technology and Market Outlook 368
- 10.2.4 Logic-DRAM Stack Initiatives and Emerging Players 372

Chapter 11 — COMPANY PROFILES 377 (109 company proffiles)

REFERENCES 486

List of Tables

Table 01 DRAM Market Revenue Forecast by Segment (2022–2036F), $M 37
Table 02 DRAM Bit Shipment Forecast by Technology (2022–2036F), Gb 40
Table 03 DRAM ASP Forecast by Technology Node and Generation (2022–2036F), $/Gb 43
Table 04 DRAM Capex Forecast by Supplier (2022–2036F), $M 46
Table 05 DRAM Wafer Production Forecast by Supplier (2022–2036F), k wspm 49
Table 06 CBA Architecture Adoption Rate by Supplier (2024–2030F) 52
Table 07 HBM Revenue Forecast by Generation (HBM2E–HBM5E), 2022–2036F, $M 56
Table 08 HBM Bit Shipment Forecast by Generation (2022–2036F), Gb 59
Table 09 HBM Wafer Demand Forecast: Standard vs. Custom HBM (2022–2036F), k wspm 62
Table 10 HBM Customer Demand Breakdown – Nvidia, Google, AMD, Hyperscalers (2024–2028F) 65
Table 11 Standard vs. Custom HBM Revenue Forecast (2024–2030F), $M 68
Table 12 China HBM Capacity Outlook and Technology Status (2024–2030F) 71
Table 13 HBM Generation Mix and Transition Timelines (2022–2030F), % 74
Table 14 DRAM Supplier Financial Summary: Revenue, Gross Margin, Capex (2022–2025) 110
Table 15 Global DRAM Market Share by Supplier (2022–2026), % 110
Table 16 M&A and Strategic Partnership Activity in the DRAM Industry (2020–2026) 122
Table 17 CXMT Technology Node Roadmap and Capacity Targets (2024–2028) 137
Table 18 JHICC Technology Progress Update and Strategic Milestones 141
Table 19 China DRAM Wafer Production Forecast by Player (2024–2030F), k wspm 152
Table 20 EUV Layer Adoption in DRAM by Node and Supplier (2023–2030) 170
Table 21 DRAM Scaling Metrics: Cell Size, Capacitance, and Leakage by Generation 161
Table 22 DDR5 vs. DDR4 Specification Comparison and Adoption Timeline 188
Table 23 LPDDR5X and LPDDR6 Key Specifications and Application Targets 191
Table 24 GDDR7 Specification Summary and Target Markets 194
Table 25 HBM Generation Specifications Comparison (HBM2E–HBM5): Bandwidth, Pins, Capacity 206
Table 26 HBM Market Share by Supplier (2022–2028F), % 210
Table 27 HBM4 Key Specifications, Adoption Timeline, and Integration Requirements 231
Table 28 Custom HBM (cHBM) Players, Products, and Design Roadmaps 226
Table 29 HBM Demand by End Customer (AI/Data Centre Focus), 2023–2028F, Gb 239
Table 30 3D DRAM Technology Readiness Assessment by Player (2026) 262
Table 31 3D DRAM Top Patent Holders: Assignee, Patent Count, and Key Claims 276
Table 32 Curated List of Key 3D DRAM Patents (Selected, 2010–2025) 279
Table 33 3D DRAM Long-Term Market Share Scenarios (2030–2038F), % 283
Table 34 Global DRAM Fab Capacity by Supplier and Site (2025), k wspm 297
Table 35 Key DRAM Fab Expansion and Greenfield Projects (2024–2028) 305
Table 36 Leading-Edge DRAM Node Definitions by Supplier (Samsung/SK hynix/Micron) 309
Table 37 DRAM Equipment Market Forecast by Process Step (2022–2030F), $M 318
Table 38 Key Equipment Suppliers for DRAM Manufacturing – Competitive Overview 326
Table 39 DRAM Materials Market Forecast by Segment (2022–2030F), $M 330
Table 40 Hybrid Bonding Adoption Roadmap for DRAM Applications (2023–2030) 344
Table 41 Advanced Packaging Technologies for DRAM – Technical Comparison Matrix 355
Table 42 CBA DRAM Architecture Summary: Supplier Implementations Compared 348
Table 43 AI Accelerator Memory Requirements: Bandwidth, Capacity, Power (2024–2030F) 364
Table 44 Near-Memory and In-Memory Computing: Technology Landscape and Key Players 368

List of Figures

Figure 01 Global DRAM Market Revenue ($B), 2015–2036F 17
Figure 02 DRAM Market Cyclicality – Annual Revenue Growth Rate (%), 1985–2036F 19
Figure 03 DRAM Bit Demand Growth vs. Supply Growth (YoY %), 2010–2036F 22
Figure 04 DRAM Revenue Split by Segment: 2024 Actual vs. 2028 Forecast 26
Figure 05 AI Supercycle – DRAM Revenue Trajectory Toward $400B (2022–2028F) 29
Figure 06 DRAM Revenue Forecast by Technology Node (2022–2036F) 37
Figure 07 DRAM Bit Shipment Forecast by End Market (2022–2036F) 40
Figure 08 DRAM ASP Evolution – Blended vs. HBM vs. Commodity (2018–2036F) 43
Figure 09 DRAM Capex Forecast by Supplier: Samsung, SK hynix, Micron (2022–2036F) 46
Figure 10 DRAM Wafer Production Forecast: Leading-Edge vs. Lagging-Edge (2022–2036F) 49
Figure 11 CBA DRAM Architecture Adoption Rate by Supplier (2023–2030F) 52
Figure 12 HBM Revenue Forecast by Generation: HBM2E to HBM5E (2022–2036F) 56
Figure 13 HBM Bit Shipment Forecast – Total and by Generation (2022–2036F) 59
Figure 14 HBM Base Logic Wafer Demand Forecast: Standard vs. Custom HBM (2022–2036F) 62
Figure 15 HBM Customer Demand Breakdown: Nvidia, Google, AMD, Other (2023–2028F) 65
Figure 16 Standard vs. Custom HBM Revenue Split (2024–2030F) 68
Figure 17 HBM Generation Mix: HBM2E to HBM5E as % of Total Bit Shipments (2022–2030F) 74
Figure 18 China HBM Ecosystem: Technology Progress Map and Gap Analysis (2026) 71
Figure 19 DRAM Market Timeline – Key Technology and Business Milestones (1970–2026) 83
Figure 20 DRAM Bit Cell Size Scaling Trend vs. Moore's Law (1990–2026) 86
Figure 21 DRAM Revenue and Gross Margin by Supplier (2000–2025) 96
Figure 22 DRAM Market Consolidation: Number of Active Suppliers (1985–2026) 93
Figure 23 Global DRAM Market Share by Supplier (2022–2026), Revenue % 110
Figure 24 Samsung, SK hynix, Micron – Revenue, Gross Margin, and Capex (2018–2025) 113
Figure 25 DRAM Supplier Technology and Cost Competitiveness Positioning Matrix 130
Figure 26 China DRAM Industry Overview: Capacity, Revenue, and Technology Gaps 134
Figure 27 CXMT Node Roadmap and Cumulative Capacity Ramp (2022–2028F) 137
Figure 28 JHICC Technology Progress Update and Timeline (2020–2026) 141
Figure 29 China DRAM Wafer Production Forecast by Player (2024–2030F) 152
Figure 30 US Export Control Impact on China DRAM Technology Access (2022–2026) 148
Figure 31 DRAM Bit Cell Structure Evolution: 1T1C Planar to Sub-10nm (1970–2026) 161
Figure 32 DRAM Capacitor Scaling Challenges: Aspect Ratio and New Materials 164
Figure 33 EUV Lithography Adoption Roadmap for DRAM by Supplier (2022–2030F) 170
Figure 34 High-k / Metal Gate Integration Options for Sub-10nm DRAM Nodes 173
Figure 35 Novel DRAM Cell Materials: Dielectric Candidates and Process Maturity 175
Figure 36 Samsung DRAM Technology Node Roadmap (2024–2030F) 179
Figure 37 SK hynix DRAM Technology Node Roadmap (2024–2030F) 182
Figure 38 Micron DRAM Technology Node Roadmap (2024–2030F) 185
Figure 39 DDR5 Adoption Curve and DDR6 Development Timeline (2023–2030F) 188
Figure 40 HBM Architecture Overview: Die Stack Cross-Section and Key Components 202
Figure 41 HBM Bandwidth Evolution: HBM1 to HBM5 – GB/s Per Package 206
Figure 42 HBM Market Share by Supplier (2022–2028F), Revenue % 210
Figure 43 SK hynix HBM Product Strategy and Technology Roadmap 214
Figure 44 Samsung HBM Product Strategy and Technology Roadmap 218
Figure 45 Micron HBM Product Strategy and Technology Roadmap 222
Figure 46 Custom HBM (cHBM) Architecture: Co-Design Concept and Integration Approach 226
Figure 47 HBM4 Die-to-Wafer Bonding Integration Scheme and Stack Configuration 231
Figure 48 HBM Wafer Capacity Allocation: Impact on Standard DRAM Supply (2024–2028F) 235
Figure 49 China HBM3/HBM3E Progress Update: CXMT and JHICC Status (2026) 244
Figure 50 HBM Demand Driven by AI Accelerators: Nvidia GPU Roadmap Overlay 239
Figure 51 3D DRAM Concept Architectures: Vertical Channel, Surrounding Gate, and Stack Approaches 255
Figure 52 3D DRAM R&D Activity Map by Player (Samsung, SK hynix, Micron, IMEC), 2020–2026 258
Figure 53 3D DRAM vs. 2D DRAM: Density, Bandwidth, and Power Efficiency Comparison 265
Figure 54 3D DRAM Commercialisation Timeline Scenarios: Base, Bull, Bear Cases 268
Figure 55 3D DRAM IP Landscape: Patent Filing Trends by Year and Assignee (2010–2025) 273
Figure 56 3D DRAM Long-Term Market Share Scenarios (2030–2038F), % of Total DRAM Revenue 283
Figure 57 2D-to-3D DRAM Transition: Impact on DRAM Equipment Market (2030–2038F) 287
Figure 58 Global DRAM Fab Map: Locations, Capacity, and Technology Nodes (2025) 297
Figure 59 DRAM Wafer Production by Node and Supplier (2022–2030F), k wspm 301
Figure 60 Leading-Edge DRAM: Node Naming Conventions and Density Comparison by Supplier 309
Figure 61 DRAM Equipment Market Forecast by Tool Category (2022–2030F), $M 318
Figure 62 Etch and Deposition Equipment for DRAM: Market Size and Key Suppliers 322
Figure 63 DRAM Materials Market Forecast by Segment (2022–2030F) 330
Figure 64 CMP and Cleaning Materials for DRAM: Demand Outlook by Node 334
Figure 65 Hybrid Bonding Technology Overview: Process Flow for DRAM Applications 344
Figure 66 CBA DRAM Architecture: Array/Periphery Wafer Bonding Schematic 348
Figure 67 Advanced DRAM Packaging Roadmap: From Wire Bond to Hybrid Bond (2018–2030F) 355
Figure 68 HBM Integration in AI Computing Systems: Package-Level Architecture View 364
Figure 69 Memory-Compute Integration Architectures: Taxonomy and Use Cases 360
Figure 70 Near-Memory and In-Memory Computing: Market Opportunity and Key Players (2026–2036)